Exemplary embodiments in accordance with principles of inventive concepts relate to a FIFO buffer.
The use of mobile devices, such as smart phones, tablet PCs, digital cameras, and MP3 players, for example, has expanded greatly in recent years. One reason for the explosive increase in use of such devices is that they have all increased greatly in functionality. That increase in functionality is due, in no small measure, to the increased usage of “system-on-chip” (hereinafter referred to as a SoC). AnSoC may include various functional blocks such as: a DMA (Direct Memory Access), an UART (Universal Asynchronous Receiver/Transmitter), an RCV (Remocon Receiver), and a display controller, for example. Such functional blocks may transfer data through a FIFO (First-In-First-Out) buffer and a chip, or SoC, may include plural FIFO buffers for various purposes.
In a mobile device, a plurality of consumers (also referred to herein as data-consuming functional blocks, or, simply, as data-users) may exist with respect to the same data to play one content. For example, when image data generated the data may be simultaneously output and backed up. For example, a frame generated when a moving picture is processed may be simultaneously provided to a display controller for playing and a DMA module for a transfer to a backup memory.
Frame data for a transfer to the display controller for playing and frame data for a transfer to the DMA module may be stored in FIFO memories, for example. However, data consumption speeds and patterns of use may be different for different functional blocks. For example, a delay in providing a frame to a display may cause such a critical problem that it is impossible to play contents and, as a result, frame data provided for time-critical (for example, real time), use may be quickly transferred. On the other hand, data provided for backup may experience delays without critically affecting operations and, as a result, data transfer rates for non-real-time operations, such as backup operations, may be lower than that for real-time operations, such as display.
With ever-increasing demands for functionality, there may be a concomitant demand for an increased number of FIFO buffers in an SoC. However, an increase in the number of FIFO buffers could increase power consumption and increase the volume of the SoC. Such potential problems may become particularly acute with the increased use of multimedia data, for example.